This application is based upon and claims priority from prior French Patent Application No. 98-02401, filed Feb. 27, 1998, the entire disclosure of which is herein incorporated by reference.
1. Field of the Invention
The present invention relates to testing of dynamic characteristics of components or circuits using serial transmissions, and more specifically to evaluating the resistance of components or circuits in the face of frequency dispersion and frequency fluctuations.
2. Description of Related Art
The phenomena of frequency dispersion corresponds to a frequency shift observed between different quartz crystals of the same nominal frequency. The sources of this shift are often inherent in the components of the circuit. Further, frequency fluctuations usually have causes that are external to the circuit, but may also come from the circuits itself. The frequency fluctuations are expressed as low random frequency variations between the received and transmitted signals. This phenomenon is commonly known as xe2x80x9cjitterxe2x80x9d. Frequency dispersion and frequency fluctuations must be taken into account when transmitting data.
There are two major types of wired transmission between a transmitter and a receiver. First, there is parallel transmission which is characterized by the sending of information in the form of binary signals and a clock signal with the information being sent on different links between the transmitter and the receiver. At the receiver, the information elements are sampled by the clock signal. There is a major frequency limitation with this type of transmission because the information does not reach the receiver simultaneously. Thus, it is necessary to wait for all information elements of a first group of transmitted data elements to reach the receiver before sending the next group of data. The difference in transit times between the different data signals and the clock is inherent in this type of communication and is commonly known as xe2x80x9cskewxe2x80x9d.
The second mode of wired transmission is serial transmission which is characterized by the sending of information containing data to be transmitted and the clock signal as a single signal. The single signal must simultaneously convey data information and clock information. At the receiver, the clock signal must be extracted from the received bit train and then the clock signal is used to sample the data contained in the same bit train. Consequently, the frequency limitation with serial transmission (i.e., the skew) dictated by parallel transmissions is eliminated so it is possible to transmit data on a single wire at far higher bit rates. Thus, the link, which may be either a copper cable or optical fiber having an inelastic cost, is made more economical.
However, a serial link also has a frequency limitation that is essentially caused by two phenomena. First, any link dictates a frequency limitation of the signals that it conveys because of its passband. Beyond certain frequencies, the attenuation of signals in the cables is far too great for the transmitted information to be exploited in the receivers. Further, each element that plays a role in the link introduces and is subject to frequency disturbances. This phenomenon may come from the transmitter itself, from carriers of the link (whether it is a copper cable or optical fiber) or from electrical noise. However, when a parallel link can operate at 100 MHZ, a serial link typically can operate at several megabits per second.
The key to implementing economically viable serial links is use components known as multiplexing devices and demultiplexing devices in lowcost components. By means of multiplexing devices, data that has to be transmitted can be let through on only one wire. The demultiplexing devices can be used to recover the clock signal in the series signal and demultiplex the data received. Such components (i.e., those developed by SGS THOMSON under the references FC106, GE105, and SBPH400-3 often raise a large number of problems, especially with respect to production tests. Indeed, no integrated circuit tester on the market can be used to probe or generate signals in the transmission speed range of gigabits (109 bits) per second.
Thus, the component must be provided with a self-testing device that must include an internal oscillator activating the circuit in its range of operation, and a data generator such as a pseudo-random generator. The data elements are sent in the form of binary signals to the multiplexing device, which converts them into a series signal. The component, in self-testing mode, must send the series signal to the input of the demultiplexing device, which will recover the clock signal and demultiplex the binary signal. The recovered binary signals are then sent to a logic circuit, which verifies their conformity and detects and counts any errors. Thus, by initializing the circuit in self-testing mode, allowing it to work independently for a few milliseconds, and then re-reading the error counter, it is possible to test the operation of a component on any low frequency tester. This type of testing can be applied at both the integrated circuit level and the assembled circuit (or package level).
FIG. 1 shows a schematic diagram of such a self-testing device. A clock generator 1 provides a clock signal CLK1 to both a transmitter 2 and a receiver 3. The output of the transmitter 2 is supplied to a multiplexing device 4 and a demultiplexing device 5 is connected to an input of the receiver 3. The multiplexing device 4 delivers a signal to the input of a data processing circuit 7 that sends a signal to the demultiplexing device 5. A link 6 controlled by a switch 8 directly loops the output of the multiplexing device 4 to the input of the demultiplexing device 5. In normal operation, the link 6 is open and is not used. The link 6 is used in the context of the self-test.
This self-testing technique is highly efficient. However, it cannot be used to test all the dynamic characteristics of the component because it does not correspond to the real use conditions of the component. In a real application, the components communicating with one another through the serial link are activated by clocks whose signals are generated by quartz crystal oscillators of the same nominal frequency. However, these quartz crystal oscillators inevitably have frequency dispersions (typically of 100 ppm), and the component must compensate for these frequency dispersions. The self-test generator activates the transmitter and receiver with the clock signal generated by the internal oscillator alone. This is the ideal case in which frequency dispersions are absent and is far from practical environments.
Furthermore, the real use conditions are also not met because the link between the transmitter and the receiver is internal to the component, and thus subjected to very little disturbance. Thus, this technique does not make it possible to measure the robustness of the link in the face of external frequency fluctuations. The self-testing technique is known for testing components that integrate serial links. At the present time, the limitations of such testing are circumvented to an approximate extent by sampling components, mounting them on cards, and carrying out more extensive tests on the samples. However, these tests represent a significant production cost and do not cover all of the components.
In view of these drawbacks, it is an object of the present invention to remove the above-mentioned drawbacks and to provide a system that presents a solution to these testing problems. The system makes it possible to test the robustness of each component in the face of frequency dispersions and frequency fluctuations in the self-testing mode. Therefore, it is possible to obtain an exhaustive characterization of the dynamic performance characteristics of the components at a cost compatible with the constraints of mass production. The main constraints are that it is still difficult to generate an external clock signal capable of having a flow rate of about one gigahertz, and even if it were possible to make such a clock signal, it would be necessary to generate two clock signals with slightly different periods, on the basis of this single clock signal, to be able to observe the drift between the edges of the clock signal given to the transmitter of the circuit with respect to the edges of the clock signal given to the receiver of the circuit.
In the component, two clock signals are generated instead of one. A first clock signal is used for the multiplexing device and a second clock signal is used for the demultiplexing device. The two clock signals have very substantially different frequencies, and this frequency difference can be constant to set up a model of the frequency dispersion of the quartz crystal oscillator. The frequency difference can also be variable to set up a model of the effect of frequency fluctuation on the line. The pseudo-random variations in the frequency of the transmitter clock signal give rise to variations in the identical generated series signal that are similar to uncontrolled frequency fluctuations. By controlling this frequency difference, it is possible to measure the resistance of the component to frequency dispersions and frequency fluctuations. For this purpose, it is enough to gradually increase the frequency difference and raise the threshold from which the self-testing circuit detects transmission errors.
One embodiment of the present invention provides a device for testing dynamic characteristics of an electronic component or circuit using serial transmissions. The component or circuit includes a multiplexing device and a demultiplexing device that implement a serial link in the component or circuit. The testing device includes a transmitter for providing the multiplexing device with data elements to be multiplexed, a receiver for receiving the multiplexed data elements from the output of the demultiplexing device, and a link that provides a coupling between the output of the multiplexing device and the input of the demultiplexing device. Additionally, the testing device includes a device for delivering a first clock signal and a second clock signal, with the first clock signal being supplied to the transmitter and the second clock signal being supplied to the receiver. The first clock signal and the second clock signal have different frequencies. Thus, it is possible to observe the robustness of the component in the face of frequency dispersions and frequency fluctuations. A method of testing dynamic characteristics of an electronic circuit using a testing device is also provided.
Other objects, features, and advantages of the present invention will become apparent from the following detailed description. It should be understood, however, that the detailed description and specific examples, while indicating preferred embodiments of the present invention, are given by way of illustration only and various modifications may naturally be performed without deviating from the present invention.